S2C.
S2C.

Benefits

Technology

Early IP Verification without the complete SoC design

  • IP blocks connected to the AXI bus can be verified without processor cores or peripheral blocks

  • Early algorithm/architectural exploration can be performed on the FPGA while taking advantage of the FPGA environment's speed performance



Shorten Design Verification Time with a high-throughput channel

  • Transaction-level verification is utilized to ensure system-level result accuracy

  • C-code is used as a stimulus to reduce the time and effort in creating RTL test benches



Achieve High Product Reliability with improved test coverage

  • Create corner test cases in software and run exercises on an FPGA-based prototype

  • Run high-performance regression tests on an FPGA-based prototype with vectors stored in host computers


Business

Eliminate Resource & Expertise Constraints by removing the need for the creation of additional specialized hardware and software

Prodigy ProtoBridge Reuse Across Multiple Projects as the flexibility of Prodigy ProtoBridge makes it ideal for any design


AXI-4 Bus Protocol Between Host PC and FPGA

  • Instantiation of AXI-4, AXI4-Lite, AXI-3 and AHB bus connections on FPGA ports

  • Configurable data width from 32-bit to 1024-bit

  • Support for an independent clock for each Master/Slave instance



Exercise of Large Amounts of Verification Data at High Speed

  • Transmission through 8-lane PCIe Gen3 between Host PC and FPGA

  • Massive data transfer from Host PC to FPGA up to 4000 MB/s

  • Support for direct and DMA access modes



Rich Coverage of C Function Calls Between Host PC and FPGA

  • System initialization function calls to manage the tool environment

  • Interrupt control function calls to identify the source of an interrupt signal for C-API's follow-up actions

  • Data read/write function calls to communicate with and operate the FPGA circuit

  • DMA transfer function calls to perform DMA operations for large amounts of data


Benefits of Prodigy ProtoBridge


Get World-Class Support to help design teams with any issues that arise-something not available with in-house solutions leaving design teams to fend for themselves

Related S2C Complete Prototyping Solutions
Virtex UltraScale Series
S2C's Virtex UltraScale (VU) Prodigy Logic Systems are built on the Virtex UltraScale XCVU440 FPGA from Xilinx.
Neuro
Neuro enables users to quickly access FPGA computing power and CPU cluster resources deployed in data centers or company computer rooms through various terminal devices.
ARM Processor Adapters
Zynq Interface Module, SO-DIMM Memory Module
What's New at S2C
Request for Quote
What type of chip are you designing
What is the capacity of the ASIC gate included in the design?
5 million-20 million
20 million-50 million
50 million-100 million
100 million-1 billion
More than 1 billion
Which FPGA do you prefer to use?
Xilinx VU440
Xilinx KU115
Xilinx VU19P
Xilinx VU13P
Xilinx VU9P
AMD VP1802
AMD VP1902
Intel S10-10M
Intel S10-2800
Not sure, need professional advice
What kind of FPGA configuration do you need?
Single FPGA
Dual FPGA
Four FPGAs
Eight FPGAs
Not sure, need professional advice
What kind of peripheral interface do you need?
How many prototype verification platforms do you need?
Do you need the following tools?
Segmentation tool
Multiple FPGA debugging tools
Co-modeling tool (allows large amounts of data to interact between FPGA and PC host)
When do you need to use our products?
0-6 months
6-12 months
More than 12 months
Not sure
Any additional comments?