S2C.
S2C.
Resources

Technical Papers

E-book: PROTOTYPICAL II - The Practice of FPGA-Based Prototyping for SoC Design
E-book: PROTOTYPICAL II - The Practice of FPGA-Based Prototyping for SoC Design
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Continued semiconductor industry growth depends on delivering ever  more complex chip designs, co-verified with specialized system software  – in less time with relatively fewer mistakes. In this book, we will initially look at how the need for co-verification evolved with chip complexity, where FPGAs got their start in verification, and why ASIC  design benefits from prototyping technology.

E-book: PROTOTYPICAL - The Emergence of FPGA Prototyping for SoC Design
E-book: PROTOTYPICAL - The Emergence of FPGA Prototyping for SoC Design
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In this book, we uncover the history of FPGA-based prototyping and three leading system providers – S2C, Cadence, and Synopsys. First, we look at how the need for co-verification evolved with chip complexity, where FPGAs got their start in verification, and why ASIC design benefits from prototyping technology. The book also includes a Field Guide to help effectively navigate the FPGA prototyping flow using best practices and technologies.


White paper: How do Logic Simulation, Emulation, and FPGA Prototyping work?

How can we guarantee the DUT's suitable operation with intricate RTL codes? The answer lies in functionalverification. The frequently used verification approaches include simulation, emulation, and prototyping. Each of them has its advantages and disadvantages.

In this white paper, we will delve into the mechanics of logic simulation, emulation, and FPGA prototyping, focusing on their interaction with the DUT.


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White paper: ProtoBridge – Accelerate Design Verification, Architecture Exploration and Software Development

ProtoBridge AXI from S2C enables designers to maximize the benefits of FPGA-based prototypes early in the design project and corner case testing by providing a high bandwidth datapath between software running on a workstation and the FPGA prototype. This white paper elaborates on the key FPGA-based prototyping challenges and considerations to see how S2C ProtoBridge helps address them.


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White paper: Advanced SoC Debug with Multi-FPGA Prototyping

Today's FPGA prototyping for SoC design debug offers tradeoffs among the ideal debug tool capabilities, and it is left to the SoC design verification team to configure an “optimal” verification strategy for each SoC design project – with consideration for future scaling-up and improved verification capabilities. This white paper reviews some of the multi-FPGA prototyping challenges for SoC design verification and debug, and, reviews one example of a commercially available multi-FPGA prototyping debug capability offered by S2C.

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White paper: FPGA Prototyping Primer

FPGA prototyping is the methodology to prototype SoC and ASIC designs on FPGAs for hardware verification and for early software development. This methodology is sometimes referred also as ASIC prototyping or SoC prototyping. Prototyping SoC and ASIC designs on FPGAs has become a mainstream verification methodology for hardware design as well as a method for early software and firmware co-design. This primer on FPGA prototyping will discuss the important factors of why to prototype, the current challenges of prototyping and how to overcome them, and the issue of building your own or adopting an off-the-shelf prototyping solution.

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Request for Quote
What type of chip are you designing
What is the capacity of the ASIC gate included in the design?
5 million-20 million
20 million-50 million
50 million-100 million
100 million-1 billion
More than 1 billion
Which FPGA do you prefer to use?
Xilinx VU440
Xilinx KU115
Xilinx VU19P
Xilinx VU13P
Xilinx VU9P
AMD VP1802
AMD VP1902
Intel S10-10M
Intel S10-2800
Not sure, need professional advice
What kind of FPGA configuration do you need?
Single FPGA
Dual FPGA
Four FPGAs
Eight FPGAs
Not sure, need professional advice
What kind of peripheral interface do you need?
How many prototype verification platforms do you need?
Do you need the following tools?
Segmentation tool
Multiple FPGA debugging tools
Co-modeling tool (allows large amounts of data to interact between FPGA and PC host)
When do you need to use our products?
0-6 months
6-12 months
More than 12 months
Not sure
Any additional comments?
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