Know More About Prototype Verification

The design, verification and manufacture of chips are all inseparable from EDA tools. The verification runs through the entire chip design process, and the verification time usually accounts for about 70% of the entire R&D project. Is this too long? It will be so great if there was a quick and easy-to-use verification tool. That's why prototype verification came into being.

What is Prototype Verification?

After the architects have completed the building design, they need to verify and test various parameters such as earthquake resistance, wind resistance, and structural strength through models before starting construction. Similarly, chip designers also need to "prototype" the design before tape-out.

This verification method is cheaper than tape-out and it has higher-performance than simulation. It can simulate the function and application environment of the chip to verify the overall function of the chip. Once a problem is found, it can also change its own hardware logic through programming on the spot, and support repeated erasing and rewriting until the design is satisfied. You must know that a tape-out can easily cost millions of dollars. Once it fails, the consequences will be quite terrifying!

In addition, it can also be used as a platform for software development and verification before tape-out, which greatly shortens the project development cycle and accelerates product launch. It feels like you can make money very soon

What challenges does prototyping face?

Today, the semiconductor industry has entered the post-Moore era. Tens of billions of transistors are integrated on a chip the size of a fingernail, and the complexity of the entire chip has skyrocketed. This also brings unprecedented challenges to prototype verification: design segmentation, I/O allocation, high-speed interfaces, etc.. All these will all face higher requirements.

Some companies specializing in the development and provision of commercial prototype verification platforms will provide a prototype verification platform with corresponding software and interface solutions. After more than ten years of development, it has experienced many iterative innovations in terms of platform capacity, speed performance, etc., helping most chip design companies to improve verification efficiency, and is favored by many chip companies. However, only a few companies currently offer enterprise-grade prototyping solutions.